STM32 MPU configuration tips
Posted: 11-Jul-2023, 22:08
Introduction to the Cortex-M7 MPU and AN4838 (Introduction to memory protection unit management on STM32 MCUs) says:
The MPU is an optional component for the memory protection. Including the MPU in the STM32 microcontrollers (MCUs) makes
them more robust and reliable. If the MPU is not enabled, there is no change in the memory system behavior.
When DMA is used in the project, RAM memory used by DMA should not be cacheable. Is cache is used with DMA, cache need to be invalidated before each transaction.
Safe-Background MPU region 0 initialization:
Video tutorial: https://www.youtube.com/watch?v=QnDenqvzwyE
The MPU is an optional component for the memory protection. Including the MPU in the STM32 microcontrollers (MCUs) makes
them more robust and reliable. If the MPU is not enabled, there is no change in the memory system behavior.
When DMA is used in the project, RAM memory used by DMA should not be cacheable. Is cache is used with DMA, cache need to be invalidated before each transaction.
Safe-Background MPU region 0 initialization:
Code: Select all
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
MPU_InitStruct.BaseAddress = 0;
MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
MPU_InitStruct.SubRegionDisable = 0x87;
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
MPU_InitStruct.AccessPermission = MPU_REGION_NO_ACCESS;
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
HAL_MPU_ConfigRegion(&MPU_InitStruct);
[…other regions…]
// Enable the MPU, use default memory access for regions not defined here
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
Existing code for other regions can be modified by incrementing the Region number as long as the total number of 8 (or 16, depending on device) regions is not exceeded. Read more...MPU_REGION_NO_ACCESS removes program access permissions (no read or write permissions, in both Handler and Thread modes).
MPU_INSTRUCTION_ACCESS_DISABLE blocks code execution.
TEX=0, C=0, B=0 would make this region Strongly Ordered, which is always shareable, so MPU_ACCESS_SHAREABLE has no effect, but also does not cause confusion by claiming the opposite while being ignored.
Video tutorial: https://www.youtube.com/watch?v=QnDenqvzwyE